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ClueLogic > Posts tagged uvm_reg_sequence

Tag: uvm_reg_sequence

UVM Tutorial for Candy Lovers – 24. Register Access through the Back Door

September 14, 2014April 3, 2016 Keisuke Shimizu

Last Updated: February 14, 2015 (fixed broken EDA Playground link) This post will add back-door access to the registers defined in Register Abstraction. With a few additional lines of code, you can access the registers through the back door. DUT Read More …

UVMUVM_BACKDOOR, uvm_reg, uvm_reg_block, uvm_reg_data_t, uvm_reg_field, uvm_reg_sequence, uvm_status_e48 Comments

UVM Tutorial for Candy Lovers – 9. Register Abstraction

October 29, 2012November 6, 2016 Keisuke Shimizu

Last Updated on November 6, 2016 This post will explain how to use the UVM Register Abstraction Layer (RAL) to generate register transactions.

UVMuvm_reg, uvm_reg_adapter, uvm_reg_block, uvm_reg_field, uvm_reg_predictor, uvm_reg_sequence116 Comments
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