Last Updated: September 14, 2013 This post will explain how UVM field macros (`uvm_field_*) work.
Last Updated: September 9, 2013 UVM factory is used to create UVM objects and components. This post will explain the UVM factory using jelly beans (as you expected) and reveal what happens behind the scenes in the factory.
Last Updated: June 29, 2014 This post will provide an explanation on the SystemVerilog code itself. Please see Recipe for the class diagram.
Last Updated: April 4, 2014 While the last post clarified the verification components of the jelly-bean taster, this post will provide a focus for the jelly-bean recipe.